Microcomputer Systems MSI-P602 Manual do Utilizador

PC/104 EmbeddedIndustrial Analog I/O SeriesMicrocomputer Systems, Inc.1814 Ryder Drive ¨ Baton Rouge, LA 70808Ph (225) 769-2154 ¨ Fax (225) 769-2155Em

III. GPS SOFTWARE COMMANDSNMEA 0183 PROTOCOLEAppendix A, beginning on page 83 of the Condor Series GPSModules User Guide http://www.microcomputer

Page 11 MSI-P604 User ManualIV. SAMPLE BASIC LANGUAGE TEST PROGRAMThe BASIC language program below illustrates software sequencesfor the NMEA

Page 12 MSI-P604 User ManualCASE “2” ‘set digital outputs to &h5 ‘(send &HA since MCR bits are inverted)outvalue = &HA ‘ inv

Page 13 MSI-P604 User ManualINPUT “Enter command (between $PMKT and * characters) =“, gpsmsg$gpsmsg$ = “$PMTK” + gpsmsg$GOSUB sendmsgGOTO begi

Page 14 MSI-P604 User Manualsendpchar: ‘Send character pchar to UART (U5) portWHILE (INP(PRIMARY + 5) AND &H40) = 0: WENDOUT PRIMARY, ASC

pchar$ = MID$(gpsmsg$, i, 1)GOSUB sendpcharNEXT ipchar$ = “*”: GOSUB sendpcharpchar$ = MID$(pchar1$, 1, 1): GOSUB sendpchar ‘send chechsumMSDpchar$ =

V. SPECIFICATIONSPC/104 16-bit, stackthroughCondor C2626 GPS ReceiverSee http://www.microcomputersystems.com/Condor C2626 Technical Notes.pdfDocumen

APPENDIXSchematic Diagrams of the MSI-P6041) P602-1.sch - Schematic sheet 1 of 2.See P604-1.pdf2) P602-2.sch - Schematic sheet 2 of 2.See P604-2.pdfPa

CONTENTSI. INTRODUCTION 3II.HARDWARE DESCRIPTIONA. Card Configuration 5B. Card Addressing 6C. Interrupt Connections 7D. Digital I/O Registers and

Figure 1. Block Diagram of the MSI-P604.I. INTRODUCTIONThe MSI-P604 is a low cost, high performance global positioningsystem which uses the Trimble C

Page 4 MSI-P604 User ManualFour TTL level digital inputs are provided by status lines CTSDSR, RI and DCD of the UART. The DCD input is jumpers

II. HARDWARE DESCRIPTIONA. Card ConfigurationThe MSI-P602 card is a CMOS design using through-hole andsurface-mounted devices. The card configurat

B. Card AddressingThe card address is set by installing appropriate jumper pairson JP2, pins 1 thru 16, as shown in Fig. 3.Addresses A15 thru A10 (JP2

Table 1. UART Addresses for JP2-13 & JP2-15 Selection. Jumper JP2-13 Jumper JP2-15

as shown in Fig. 4. JP1-2 can be jumpered to a desiredinterrupt, IRQ4 thru IRQ9 of JP1, using a wire-wrap typeconnection. A 1K Ohm resistor is avail

Page 9 MSI-P604 User ManualTable 2. Digital I/O UART Register Designations and J1 Pin Assignments.−−−−−−−−−−−−−−−−−−−−